Intel's new P860 logic process--which represents the company's formal entry into the copper-interconnect arena--is a 0.13-micron, six-metal layer technology that will move into production during the first half of 2001. Initially, Intel plans to bring the process up on 200-mm wafers next year, but the company said it will migrate the technology to its 300-mm plants by early 2003.

During a briefing with the press and analysts today, Intel declined to be more specific about schedule for the new technology. The company said the 0.13-micron process will enable it to keep up in the high-speed microprocessor race against rival Advanced Micro Devices Inc. and other competitors.

Intel is rolling out the new technology at a critical juncture. Over the last year, the Santa Clara chip giant has experienced an assortment of manufacturing problems and snags that caused it to delay the introductions of several key microprocessor lines. And the problems in the manufacturing sector recently led to a major reorganization within its management ranks as well (see Oct. 9 story).

At the same time, Intel is perceived to be a lagging in several new manufacturing areas, including copper interconnects, which are replacing conventional aluminum metal on ICs. In fact, Intel's rival in the PC microprocessor arena, AMD, continues to gain momentum in the x86-based chip business, thanks in part to the company's MPUs based on a copper technology licensed from Motorola Inc., say some analysts.

Moreover, Intel is believed to have lost some of its lead fine-geometry manufacturing to the world's largest silicon foundry companies--namely Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and Taiwan's United Microelectronics Corp. (UMC). Both TSMC and UMC have separately announced plans to begin pilot runs of 0.13-micron wafers in the fourth quarter this year.

Intel officials acknowledged that the company faces some challenges to regain its edge, but the company claimed it is still far ahead of its competitors in the chip manufacturing race.

In fact, Intel believes it is at least "six months" ahead of its competitors in the 0.13-micron race, claimed Sunlin Chou, vice president and general manager of the Technology & Manufacturing Group at Intel. "We have successfully developed our 0.13-micron technology," Chou said during a conference call to press and analysts today. "We have built functional SRAMs and microprocessors using 130-nm design rules."

Chou added that the company is still ahead of certain "foundries" that have announced 0.13-micron processes. "We will ramp up our 0.13-micron technology very rapidly," he said. "If you look at the foundries, they don't ramp up nearly as fast as we will. They still tend to manufacturertheir older-generation products."

But the Intel executive acknowledged that the company faces some major challenges in making the transition from 0.18- to 0.13-micron technology. ''Clearly, we had some learning experiences at the 0.18-micron node," said Chou. "This time around, we will take advantage of that learning experience."

Among those learning experiences will be Intel's entry into the copper-interconnect and low-k dielectric arenas. "At the 0.18-micron node, Intel felt copper wasn't needed," said Mark Bohr, an Intel Fellow and director of process architecture and integration for Intel. "But we feel copper is justified at 0.13-micron."

The company is also utilizing a fluorine-doped silicon dioxide low-k dielectric for interconnect, Bohr said. "The combination of these technologies results in smaller, cheaper, and higher-performance products," he said.

The new P860 follows the company's P858 process, an 0.18-micron based on an aluminum-interconnect scheme. The new P860 process will require two more mask steps as compared to the P858, but this will not impact the total costs of manufacturing, Bohr said.

The P858 process is a 1.3-volt technology that features a gate length of 0.07-micron (70-nm) as well as the industry's smallest gate-oxide thickness (1.5-nm) and SRAM cell.