Munich-based Pact is a fabless-IC design house that was formerly known as Parallel Array Computer Technology GmbH. The new chip architecture technology is called the eXtreme Processor platform by the four-year-old German company.

The first product in the platform is the XPU 128, which is a re-configurable chip that embeds 128 proprietary 32-bit processors, SRAM, I/O functions, reconfiguration managers, and other components on the same device.

In total, the chip is said to operate at speeds up to 51.2 BIPS, with total memory bandwidth of 6.4-Gbytes.

Designed for high-end computing, networking, and wireless, the XPU 128 combines the best features of a multi-parallel device, FPGA, and re-configurable microprocessor architecture in a single-chip implementation, said Dave Salisbury, director of business development for Pact.

Specifically, the chip is geared for use in high-performance supercomputers, telecommunications equipment, third-generation (3G) wireless base stations (or even 3G handsets) and other handheld products, Salisbury said.

"We have developed a new class of devices," Salisbury said. "What we have developed is a single-chip solution that supports multiple instructions in parallel. It is designed to handle large streams of data. It's also a dynamically re-configurable chip, which enables developers and OEMs to change the code on the fly," he said.

The XPU 128 is not cheap, nor small, however. Although Pact did not disclose pricing for the XPU 128, the chip itself measures 39-by-39-mm and comes in a 1,521-pin ball-grid array (BGA) package.

But the company is willing to sell the product in the form of an intellectual-property (IP) core, which could be optimized for use in wireless handsets, PDAs, and other hand-held devices, Salisbury said. "A smaller version of the XPU 128 could fit in a handset," he said.

Another feature is the chip's flexibility. "It's not a fixed-point architecture," he said. "It's like an FPGA field-programmable gate array, but our product is an order of magnitude faster than an FPGA. In our device, we have a point-to-point interconnect architecture."

It also includes some 128 processors based on a proprietary 32-bit, complex instruction set computing (CISC) technology, but the device does not incorporate an internal bus structure. "We don't not have a RISC reduced instruction set computing architecture or a classical sequential device," he explained.

"We also do not have an internal bus architecture. Bus bottlenecks have been a major problem in traditional multi-parallel devices. Instead, the chip utilizes eight different data paths to move data across the device," he added.

Engineering samples of the XPU 128 are now available, with production slated in the first quarter of 2001. Pact is also selling a reference design board based on the XPU 128.

Pact, which has about 30 employees, has been developing the product since its inception in 1996. The company was founded by Martin Vorbach, its chief technology officer. Privately-funded Pact said that its chip is manufactured on a foundry basis and packaged by Amkor Technology Inc.