"This is a very significant step," said John Kelly, general manager of IBM Microelectronics. He noted that other companies have been trying to implement low-k materials based on glasslike substances similar to the silicon dioxide that dominates current semiconductor manufacturing, but IBM is using a completely different substance: organic polymer. The process is available for ASIC designs now and can support volume product shipments early next year, the company said.

The organic polymer material, developed by Dow Chemical Co. and called SiLK, has a k-constant in the "3.0 range," Kelly said. While several companies have been attracted to the low capacitance of organic polymers, the materials have proved difficult to import into a full-scale chip production process. "Other people have looked at using organic polymers before, but nobody could successfully marry it to a copper process," Kelly said.

"Nobody that I know of has been able to announce a process based on an organic polymer," said Risto Puhakka, vice president of research operations at VLSI Research Inc., a San Jose-based semiconductor researcher. "This is the first time I've seen something like this."

This is IBM's first foray into low-k materials. Last month, the company hinted that it had a new low-k technology but declined to give details (see feature story in March online magazine). The company has also been a leader in the race to develop copper interconnect technology, and was the first company to offer chips using that technology. Many leading chip vendors have also begun development in either copper interconnect or low-k materials, or both, but IBM is the first to integrate the two in a single process, called Cu-11.

Insulators with lower capacitance, measured in k-factors, allow electrical signals to travel faster through a chip, and thus increase overall performance. While organic polymers can be producedwith very low k-constants, they are also soft and malleable, which makes them difficult to use in the harsh environment of a semiconductor fab, especially during the etch and strip stages of production.

"Polymers can have very low k-factors, but they can't be processed. That's why they are hard to integrate into the process," said Puhakka.

IBM has solved the problem by creating a polymer sandwich. The bottom and top layers of insulator are traditional oxide-based material, which is firm enough to withstand the chip processing, while the middle contains the SiLK material. Bijan Davari, IBM Fellow and vice president of semiconductor R&D, said using higher k-constant oxide material at the top layer will not have a significant impact upon the device's performance. That's because these top layers of interconnect have the greatest distance between the wires, which mitigates the higher capacitance of the insulator. "Low-k is not as critical there," he said.

"This is a very innovative solution," said Handel Jones, chairman and CEO of International Business Strategies Inc. in Los Gatos, Calif. "You have to be very careful in how you make a polymer rigid enough to be processed."

Not only does it work, Kelly said, but he stressed that using the polymer with traditional spin-on processing tools means production costs will not change significantly. IBM said that it will initially use the copper and low-k Cu-11 process for its own high-speed processors and that ASIC customers can begin designs based on the technology now. The first volume production chips using the Cu-11 process are expected in the first half of next year.

Davari said that the first IBM processors to use the technology will likely be the Power4 devices and that the combination of 130-nm line widths, copper interconnect and low-k material will allow initial frequencies in the range of 1.5 GHz or better. Further down the road, speeds will increase significantly.

"At the 0.13-micron level, we will eventually see processor frequencies of upwards of 3 GHz, and beyond," he said. The first ASIC products to use the process will likely be engines for high-speed networking products, which demand the fastest performance available.

LSI Logic Corp. announced earlier this month its own 130-nm ASIC process featuring low-k material, but not copper. Analysts said the move reflected LSI's key markets: wireless communications and consumer electronics. Neither needs the highest device speed, said Jones.

Kelly said that compared to a traditional chip with aluminum interconnect and silicon dioxide insulator, copper wiring can improve device performance by 20% to 30%. Adding the SiLK insulator to that same copper-based chip can lead to an additional 20% to 30% performance gain, he said.