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Intel plans low-cost MPU after 'Timna' for Rambus memories








Silicon Strategies


PALM SPRINGS, Calif. --Intel Corp. today confirmed that its new "Timna" integrated low-end processor for sub-$500 PCs will only support SDRAMs when it's launched in the second half of 2000. But next year, Intel also plans to roll out a second low-end processor for Direct Rambus memories, which were the original target of Timna, said Pete McWilliams, Intel fellow and director of platform architecture.

In an interview prior to his memory roadmap presentation at the Intel Developers Forum here today, McWilliams said Intel decided to switch the Timna processor to SDRAMs when questions emerged about the availability of Direct Rambus DRAMs. McWilliams said he believes Direct Rambus memories will be available in sufficient volumes in 2001 to support the yet-to-be-named low-cost processor.

McWilliams also confirmed previous reports that the upcoming next-generation "Willamette" microprocessor and its "Tahama" chip set will only support Direct Rambus DRAMs. He said Willamette and Tahama will have a Direct Rambus DRAM dual channel, building on the Intel 840 chip set.

Asked if the initial Willamette and Tahama motherboards will be six-layer printed-circuit boards similar to what was required with the 840 chip set, McWilliams inferred this might be the case. "For the desktop market our intention is to have a four-layer board, but initially this may not be the case," he added. The standard four-layer desktop motherboards are less complex and costly than six-layer boards, but also provide a greater design and operating margins when using the fast Rambus memory chips.

McWilliams only reiterated that the 815 "Solano" chip set, supporting the PC133 SDRAMs, will be introduced "in the first half of this year"--as Intel has always projected. He declined to comment whether Intel was sampling the chip set with any key OEMs.

He confirmed also that Intel and a partner, Server Works in Santa Clara, Calif. (formerly Reliance Computer Corp.), expect to have a double data rate (DDR) chip set for servers available in the first half of 2001. He said for the first time that only the 200-MHz DDR version of PC100 SDRAMs will be used. The Intel fellow claimed that 266-MHz DDR versions of PC133 chips "have too many unsolved timing issues at present. We want to work out all the issues on 200-MHz DDR memory before trying to tackle even faster speeds."

He said the entire Intel chip set line will be upgraded this year by adding a new ICH-2 I/O controller hub that essentially upgrades the South Bridge with a new ATA-100 interface. Next year, each chip set will be upgraded again. He declined to comment on whether the 2001 upgrade will adding a new USB-2.0 interface.

McWilliams told the Intel Developers Forum that the company is now shipping 820 Camino 2 plus 2 motherboards that allow the use of either Direct Rambus or SDRAM memory through Intel's Memory Transfer Hub (MTH). Existence of the 2-plus-2 board has been know for some time, but McWilliams said Intel was just confirming that boards are now being delivered in quantity.











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